Architecture Development of Computers from BC-6 to Supercomputers
Architecture, basic principles and peculiarities of computer BC-6 and data processing systems of AC-6 that were created under the directing of S.A. Lebedev, professor and his collective in the laboratory ¹1 of Fine-Mechanics and Computing Institute (the head – V.A. Melnikov) are presented here. Works of supercomputer system development under the direction of V. A. Melnikov are also considered here. The basic results of present researches in multiarchitecture computer supersystems are given here.
BC-6 became an important milestone in the history of computing. The chief designers were S.A. Lebedev, a member of academy and his assistant V.A. Melnikov. BC-6 computer was to solve big technical and scientific problems. So it had an effect on its architecture and the choice of element and construction systems.
At the beginning or 60s transistors and diodes of high quality were made in the country on witch the computer element base was built. It included diode logical schemes and amplifiers with current switchers with hanging power source. Important things of the element system were high speed of switching and high working load ability of input and output. An original construction of the computer provided high density of blocks placement and the lessing of interblock connection length. As a result high stroke frequency – 10 MHz was achieved.
Synchronization system provided an opportunity of conveyer functioning at stroke frequency and that is used in most schemes, e.g. in arithmetical and controlling devices. At the next level the speed of conveyer was identified with buffer memory work cycle that was equal to three strokes. For co-ordination of throughput of the processor and operating memory stratification and unaddressed buffer memory with associating search were used. It was a cache memory that had been realized 10 years earlier than model 85 of IBM/360 system. But according to technological reasons the volume of the memory was not big. The peculiarities of the command system were one-address structure of commands, operations with floating point, index-registers for configuration of address, double command format depending on the length of the address.
An important thing was hardware and program means for multiprogramming mode providing. They are virtual addressing memory with page organization; break system, several modes of command fulfillment in the processor and corresponding operating program systems. To realize the system of input/output the task was to provide high throughput when exchanging with memory devices on external magnetic medium and service of a number of electromechanical input/output devices. There were 7 quick directions of exchanging (7 electron cannels) and a set of slow directions. The hardware for them had and minimum coupling elements and scheme connections of theses elements with processor. The functioning of slow directions was carried out with program working with every kind of devices.
An original system of scheme papers representation and its methodology projecting were created . It was based on formula of logical scheme description and form system where information about logical block scheme and address of its connection with other blocks was.
Mentioned hardware provided multiusing operating system creation. For the computer functioning there were worked out several variants of operating systems and translators with autocode and high level languages.
Computer BC-6 had been producing since 1967 and set records of time producing – more than 15 years, and time exploitation – more than 20 years. But its influence on the computer development was not only in the exploitation time but the good ideas that used in its creation. Several generations of engineers and programmers working with the computer were brought up on these ideas.
The next big project that was carried out under the direction of V.A. Melnikov was the system of AC-6 data processing. The setting and exploitation of AC-6 in computer centers where a great number of data processing was carried out, e.g. in the Center of operational control, became the stimulus for Ac-6 system creation. A small number of devices and low throughput of AC-6 input/output subsystem was a narrow place. The project began with coupling hardware creation for BC -6. At first there were tasks for joining BC-6 with AC-6 that was to provide a connection of great number of telegraph and telephone cannels, receiving cannels of telemetrically information and also the raise of memory volume on magnetic disks and a number rise of r peripheral devices. But with the experience growth of first hardware usage it became clear that they need powerful means of data processing and opportunity system growth with the help of additional computers and devices. All this led to the task of multicomputer system developing with means of configuration.
The system base was subsystem and device specializations and unification in the frame of cannel exchange system.
Except BC-6 the system included the central processor AC-6, peripheral computer, additional devices of operating memory, magnetic disk and telemetrically information receiving controllers. All these devices were connected in one system as subscribers of first level cannel.
The system of AC-6 since 1973 was in experimental exploitation but works of its development were going on. In 1975 it was used in joint Soviet-American project “Apolon – Sojuz”. The finishing of the whole system was in 1979.
New ideas were realized in the system of AC-6 that became the base for supercomputers developing and fundamental researches of perspective system architecture. It is necessary to mention the following peculiarities:
1. Ac-6 is not a uniform multicomputer system
2. Problem orientation of central processor is to solve controlling problems of big objects and efficient translation
3. Functional specialization of peripheral machine PM-6 and other auxiliary devices.
4. Specialization of intersystem channels.
In process of creation and operation of system the discrepancy of new architectural ideas and opportunities of element base became obvious. Aiming at the further development of this direction in 1973 the project of system BESM-10 was developed, in which on the basis of a reserve received at creation ÀÑ-6, and use of high-speed integrated schemes of type ELS the creation of the perspective computing system was planned. However the Ministry of the radioindustry of the USSR did not support this project.
Continuation of works in this direction was carried out under direction of academician V.A.Melnikova within the limits of creation of supercomputer system « Electronics SS BIS ». Development of supercomputer system " Electronics SS BIS-1 " was based on that scientific luggage which had been saved up during the creation of BESM-6 and ÀÑ-6. However, to achieve the level of productivity twice as big as it was in these machines, the development of a new technological level and development of architecture corresponding to it was necessary (2).
In the original project of system some opportunities of inclusion in its structure the following problem-focused subsystems were considered: the basic machine with the vector-conveyor processor; the matrix machine: the machine for logic data processing. Besides the opportunities of inclusion of the following functional-specialized subsystems were considered: the peripheral machine; the controller of external semi-conductor memory; the controller of disk memory; external machines; operating machines. Considering all available resources and priorities the decision to postpone the matrix, logic and peripheral machines development was accepted.
While choosing the architecture of the central processor the variant of CENTRAL PROCESSING UNIT AS-6 developed in the project BESM-10, and the vector-conveyor processor was considered. Achievement of the maximal productivity was possible only if using of synchronous conveyor schemes, vector-conveyor architecture was considered to be more perspective. The subsystem of external semi-conductor memory was different by the presence of the intellectual controller intended for realization of various access methods to external memory from the basic machine and providing association of two vector machines in one system. Peak productivity of dual-processor system was accomplished by 500 Mflops . The Software consisted of operational systems of basic and external machines, programming systems in the macroassembly languages «the Fortran 77 », «Pascal», «C».
In 1991 the tests of system " Electronics SS BIS-1 " were conducted, 4 samples were made and adjusted and their installation at customers started. The project of system " Electronics SS BIS-2 " focused on the creation of multiprocessing system with productivity up to 10 Gflops was developed the same year. Except for multiprocessing basic machines it was planned to include monitor machines for management of system and preparations of problems, and also a subsystem with mass parallelism in system. However, in 1993 the decision on cessation of work was accepted.
The experience, which had been saved up during development of specified systems, allowed to begin researches on non-uniform computing supersystems. It was shown, that more effective is such construction of the system, at which closely connected subsystems with the various architecture, focused on the different forms of parallelism, taking place in greater problems, are available. At processing greater data files parallelism takes place at a level of data. With the greatest efficiency this form of parallelism is used in vector machines. Other form of parallelism - parallelism at a level of problems taking place in the programs, broken into a big number of independent or poorly connected subtasks. In this case the multiprocessing subsystem is more effective.
At the first stage the concepts of construction of non-uniform supersystems, in particular the association in the uniform computing module of the vector uniprocessor with a multiprocessor on microprocessors on the basis of access to the general memory was developed . The system can include some modules incorporated by the general system memory .
The next stage of researches was connected with the perspective analysis of SBIS usage with very high degree of integration. Use of a “closeaction” principle provides the achievement of the maximal productivity at the construction of the scaled modular multiconveyor processor, in which during the performance of complex vector operations it is possible to get tens or hundreds results of operations with a floating comma in one step .
According to the considered principles the research project of multiarchitectural computing supersystem focused on the creation of systems with productivity of more 1 Pflops was deloped. The supersystem consists of calculating subsystem, monitor-modeling subsystems, system and external memory. The calculating subsystem includes the vector multiprocessor, the scalar multiprocessor and the monitor machine. The set of modules is developed for construction of processors of different types. Comparison of the given project with foreign researches and developments shows, that the surpass under conceptual approaches to the creation of supersystems and usage of SBIS with limiting characteristics takes place.
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