Neurocomputer Development in Russia
Brief neurocomputers review of today and future development in Russia is presented.
Today one of the most challenging tasks is to change successive Von-Neuman architecture of classic calculations. It is really necessary because of growing requirements to computing resources, which is in its turn due new technological development. The neuronet technologies are one of the most intensively developed trends in definition and realization of parallel computing. These technologies allow us not only solve more effectively old complicated problems, but also solve poorly formalized or not formalized tasks, the solution of which seemed to be impossible. Correspondingly, hardware realization of neuronet algorithms changes the logic foundation of computational mathematics and rapidly increases productivity. Practical realization of hardware support of neuronet computations depends on the requirements of a specific task and is possible only when all the other approaches cannot be used. Generally, hardware realization is needed only when parallel neuronet algorithms cannot be quite effectively realized with the help of more traditional computational means, cluster configurations included.
From the very beginning of neuronet approach for problem solutions (more than 40 years ago), the issues of hardware realization were paid great attention at, because at that time high computational resources, let alone cluster configuration were inaccessible. Productivity growth and new architecture solutions of computational realizations just attract more attention to the issue. New technological means were being used – from analog operation amplifiers up to FPGA with larger integration as a basis for fragment neuronet realization. As a result, productivity of hardware support had been growing too.
The main hardware neurocomputers realization from the beginning of its existence (the 50th of the last century) up to the year 2000 is described in . The author of this book was awarded by the Russian Federation Award. It was noted that the issue of the hardware support arose when universal computers didn’t meet the speed, weight or size requirements. First hardware neurocomputers realizations were the analog ones with the net of resistors and a block of tuning (calculating coefficient values). They were built in the 60th of the last century and realized on the universal digital computer. The first realization was made in 1968. It included two analog computers MN-4 and logically presented three-layers net. In 1970 more complicated realization was built. It was oriented to object recognition of reflected radio located signal. A simple three layers neuronet, oriented to recognize two image classes and five criteria, was designed for medical diagnoses (1972). More complicated version (1974) was built in the form of a table block with removable indication panel.
At the same time the model of a continuum analog-digital neurocomputer was developed. It was oriented to recognition the reogramm by its shape. When recognizing periodic signals by their shape, analog-digital conversion led to significant dimensionality of signs (discreet number during the period of a signal existence), and, therefore, led to the rapid complication of the digital computer section. In the seventies Professor A. Galushkin offered to realize the neurons of the first layer of analog digital computer, using this formula:
This scheme was used for pathologic reogramm recognition and the weight functions were obtained at the universal computer by processing reogramm archive in the middle of the seventies of the last century. Then this principle was successfully realized in 20 years on the basis of modern microelectronic technologies, when the new, more state-of the –art neurocomputer was realized. It was designed for signal recognition its shape considering. Rapid development of microprocessors in 1975-1987 hindered the hardware neurocomputer realization, because the program neurocomputer realization built on microprocessors was the most effective for the time being
Nevertheless, in the middle of eighties, the development of high technologies led to the bum of neurocomputer development, this time with hardware realization of neuron groups in a crystal. The “Hercules” computer may serve as an example of the transition type of computer, where computation system had the architecture adapted to neuronet operations.
At the beginning of the nineties, the economic situation in Russia caused nearly complete refusal of ordered SBIS technologies, when neurochips realization was being needed. The researchers tried to keep technical potential in this field, using the technology of semi-ordered SBIS, base matrix crystals (BMC) and programmed logic integral schemes (PLIS). The attempts were made to realize neurochips and neuroboards on domestic BMK “Ispolin 60T” and “Takt 100T”. In the middle of the nineties the line of using PLIS (FPGA of the Xilinx company for neurochips, neuroboards, and neuroblocks realization was selected. Neurochips, neuroboards, and neuroblocks were realized on FPGA with volume 400 000 valves on a crystal. Right now the idea of using FPGA Virtex 2 Pro with 6-10 billion valves on a crystal for this purpose is being carried out.
At the same time, the development of continuum neurocomputer able to recognize the signals in the shape of three-layered neuronet has been realized. The first layer contained eight continuum analog-digital neurons with a weight function, charged into analog multiplier from MD through DAP.
At the moment in the world a lot of attention is being paid to the analysis of the situation and setting out new perspectives of neurochips development. The most important trends are:
- digital neurochips;
- analog and analog-digital neurochips;
- cell neurochips;
- neurochips with frequency-impulse signal modulation;
- specialized neurochips;
- fiberglass and fiberglass electronic neurochips.
The challenge is to search practical task solution which need hardware support with neuroboards and neuroblocks on the base of neurochips. These are the most challenging tasks, initiated by the high technologies development. They cannot be solved by using computational systems of the other types, provided real limits of the solution time, the volume and weight of a computational system.
- A.I. Galushkin Neurocomputers. The series “Neurocomputers and their use”. Book 3, “Radiotechnichs”, M. 2002